Recurrent Neural Networks With Column-Wise Matrix–Vector Multiplication on FPGAs

This article presents a reconfigurable accelerator for REcurrent Neural networks with fine-grained cOlumn-Wise matrix–vector multiplicatioN (RENOWN). We propose novel latency-hiding architecture recurrent neural network (RNN) acceleration using column-wise multiplication (MVM) instead of the state-of-the-art row-wise operation. hardware (HW) can eliminate data dependencies to improve throughput RNN inference systems. Besides, we introduce configurable checkerboard tiling strategy which allows large weight matrices, while incorporating various configurations element-based parallelism (EP) and vector-based (VP). These optimizations exploitation increase HW utilization enhance system throughput. Evaluation results show that our design achieve over 29.6 tera operations per second (TOPS) would be among highest field-programmable gate array (FPGA)-based designs. Compared accelerators on FPGAs, achieves 3.7–14.8 times better performance has utilization.